A decoupling capacitor is a capacitor used to decouple one part of an electrical network (circuit) from another. Noise caused by other circuit elements are shunted through the capacitor, reducing the effect noise has on the rest of the circuit. Decoupling capacitors are often found in analog areas of an integrated circuit (IC) and may be formed at the same time as transistors in the IC.
Transistors are formed in both digital and analog areas of an IC. Transistors are typically formed by providing an active area with doped source/drain regions in the substrate, a gate insulating layer over the substrate, and a gate electrode over the gate insulating layer. Contacts connect the source/drain regions and gate electrodes with a conductive interconnect structure having several horizontal conductive pattern layers and vertical via layers formed within a plurality of inter-metal dielectric (IMD) layers. Capacitor fabrication is integrated into the transistor fabrication process using various portions of the transistor as a top electrode of the capacitor, capacitor dielectric, and anode and cathode contacts of the capacitor using minimal additional steps.
As transistor design shifts to a three-dimensional design with multiple gates, metal-oxide metal (MOM) capacitor designs are adapted. MOM capacitors are digitated, multi-finger capacitors separated by dielectrics. The capacitances of these capacitors depend on the dimensions of the conducting portions, which may be metal layers or polysilicon layers. As IC dimensions shrink, the metal layers or polysilicon layers become thinner. The capacitance density of the resulting capacitors also decreases, often very significantly, because the capacitance depends largely on the geometry of the capacitor structure. For these MOM capacitors, the capacitance density decreases about 30% per technology node.
Decoupling capacitors designs with improved capacitance density that are compatible with transistor manufacturing processes continues to be sought.